Progress

June 2022

Lots more progress, but little to show as an image or video yet.

The initiator really does the heavy lifting in getting LOS on the air, and I am working through that step by step.

April 24th 2022

On booting into Special Op:

(The first line shown on the terminal is just the emulator is connected.)

Special OP was a means of booting the M18 without reference to the configuration table, but simply loading the raw OS from disk and provided five simple functions:

Read OS (Reads the OS sectors from disk to core)
Write OS (Writes core back to disk)
Dump OS (Unsure yet)
Amend Core (What it says)
Validate (Show the OS checksum - this is checked when the bootstrap loads the OS)

March 2022 - Bootstrap

The Bootstrap was loaded manually through switches on the font panel of the M18 - thankfully it's only five steps long.

(Note all numbers are in Octal)

Location 100

004400 CLB
010670 DATO 3 B 70
010570 DATO 2 B 70
011470 DATO 1 B SBCD 70
020104 JUMP 104

Actually, quite a lot of information can be gleaned from this little piece of code!

Step 100 - clears Reg B just in case
Step 101 - copies Reg B into Register 3 of device 70
Step 102 - copies Reg B into register 2 of device 70
Step 103 - copies Reg B into Register 1 of device 70, and clears Done and sets Busy
Step 104 - Jumps to same address and will apparently be stuck there forever!

However, we have instructed the computer to download sector 0 into core address 0 from device 70. This will read sector 0 from the disk and DMA it into core starting at zero.

DMA from the disk controller works by 'stealing' machine cycles from the processor to move data one word at a time into core - starting at address 0.

So, our JUMP 104 at address 104 is going to get overwritten soon....

In fact it gets replaced by a JUMP 75. It has to jump backwards because the rest of the sector is still coming in. The code after the jump does check the disk controller and then waits until the transfer is complete.

(In fact, the emulator transfers the entire 128 sector in on go, so in the trace the JUMP 104 never gets to run as it's replaced with the JUMP 75.)

Clever and simple!

Booting LOS

> b
Seeking to sector number 0(8) Reading from disk into address 00/0000
Seeking to sector number 50(8) Reading from disk into address 00/0200
Seeking to sector number 51(8) Reading from disk into address 00/0400
Seeking to sector number 52(8) Reading from disk into address 00/0600
Seeking to sector number 53(8) Reading from disk into address 00/1000
....
Seeking to sector number 204(8) Reading from disk into address 13/1200
Seeking to sector number 205(8) Reading from disk into address 13/1400
Seeking to sector number 206(8) Reading from disk into address 13/1600
Seeking to sector number 42(8) Reading from disk into address 00/0400
Unit 40 : Reg1 000000 Reg2 000000 Reg3 000000 Busy 0 Done 0
Unit 50 : Reg1 000000 Reg2 000000 Reg3 000000 Busy 0 Done 0
Unit 70 : Reg1 000042 Reg2 000400 Reg3 000000 Busy 0 Done 1

Reg A : 000000    PC : 00/0000    Carry : 1 000001 [HALT          ]
Reg B : 000000    MA : 00/0000    GT    : 0 -> 000000 [NOP           ]
BP: 000000 Switches : 000000     Int. : 1     000000 [NOP           ]
>

At present, fails after executing a JUMP IZ A - where A is zero !!

This is the start of the trace when running the bootstrap:

PC:000101 00/0101 IR:010670 DATO3B NOOP 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000102 00/0102 IR:010570 DATO2B NOOP 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000103 00/0103 IR:011470 DATO1B SBCD 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000104 00/0104 IR:020104 JMP      0104 RegA:000000 RegB:000000 C:0 GT:0
PC:000075 00/0075 IR:012770 SKIP B DONE 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000077 00/0077 IR:020105 JMP      0105 RegA:000000 RegB:000000 C:0 GT:0
PC:000105 00/0105 IR:032045 JSBR   Z 0045 RegA:000000 RegB:000000 C:0 GT:0
PC:000046 00/0046 IR:012770 SKIP B DONE 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000050 00/0050 IR:016370 DATI3A CBCD 70 RegA:000000 RegB:000000 C:0 GT:0
PC:000051 00/0051 IR:060166 ANDA     0166 RegA:000000 RegB:000000 C:0 GT:0
PC:000052 00/0052 IR:007500 AN0            RegA:000000 RegB:000000 C:0 GT:0
PC:000053 00/0053 IR:040045 INSZ     0045 RegA:000000 RegB:000000 C:0 GT:0
PC:000054 00/0054 IR:024045 JMP   I 0045 RegA:000000 RegB:000000 C:0 GT:0
PC:000107 00/0107 IR:020042 JMP      0042 RegA:000000 RegB:000000 C:0 GT:0
PC:000042 00/0042 IR:260167 STB      0167 RegA:000000 RegB:000000 C:0 GT:0
PC:000043 00/0043 IR:005001 ESWRA          RegA:000000 RegB:000000 C:0 GT:0
PC:000044 00/0044 IR:020110 JMP      0110 RegA:000000 RegB:000000 C:0 GT:0
PC:000110 00/0110 IR:250171 STA      0171 RegA:000000 RegB:000000 C:0 GT:0
PC:000111 00/0111 IR:007002 CLA            RegA:000000 RegB:000000 C:0 GT:0
PC:000112 00/0112 IR:020072 JMP      0072 RegA:000000 RegB:000000 C:0 GT:0
PC:000072 00/0072 IR:032114 JSBR   Z 0114 RegA:000000 RegB:000000 C:0 GT:0
PC:000115 00/0115 IR:220167 LDB      0167 RegA:000000 RegB:000000 C:0 GT:0
PC:000116 00/0116 IR:260173 STB      0173 RegA:000000 RegB:000000 C:0 GT:0
PC:000117 00/0117 IR:220055 LDB      0055 RegA:000000 RegB:000000 C:0 GT:0
PC:000120 00/0120 IR:007200 APOS           RegA:000000 RegB:011470 C:0 GT:0
PC:000122 00/0122 IR:260065 STB      0065 RegA:000000 RegB:011470 C:0 GT:0
PC:000123 00/0123 IR:210163 LDA      0163 RegA:000000 RegB:011470 C:0 GT:0
PC:000124 00/0124 IR:250177 STA      0177 RegA:000137 RegB:011470 C:0 GT:0
PC:000125 00/0125 IR:005010 SWAPA          RegA:000137 RegB:011470 C:0 GT:0
PC:000126 00/0126 IR:003100 RSA            RegA:057400 RegB:011470 C:0 GT:0
PC:000127 00/0127 IR:250176 STA      0176 RegA:027600 RegB:011470 C:0 GT:0
PC:000130 00/0130 IR:210164 LDA      0164 RegA:027600 RegB:011470 C:0 GT:0
PC:000131 00/0131 IR:250175 STA      0175 RegA:000200 RegB:011470 C:0 GT:0
PC:000132 00/0132 IR:220165 LDB      0165 RegA:000200 RegB:011470 C:0 GT:0
PC:000133 00/0133 IR:030057 JSBR     0057 RegA:000200 RegB:000050 C:0 GT:0
PC:000060 00/0060 IR:250174 STA      0174 RegA:000200 RegB:000050 C:0 GT:0
PC:000061 00/0061 IR:210173 LDA      0173 RegA:000200 RegB:000050 C:0 GT:0
PC:000062 00/0062 IR:014670 DATO3A NOOP 70 RegA:000000 RegB:000050 C:0 GT:0
PC:000063 00/0063 IR:210174 LDA      0174 RegA:000000 RegB:000050 C:0 GT:0
PC:000064 00/0064 IR:014570 DATO2A NOOP 70 RegA:000200 RegB:000050 C:0 GT:0
PC:000065 00/0065 IR:011470 DATO1B SBCD 70 RegA:000200 RegB:000050 C:0 GT:0
PC:000066 00/0066 IR:032045 JSBR   Z 0045 RegA:000200 RegB:000050 C:0 GT:0
PC:000046 00/0046 IR:012770 SKIP B DONE 70 RegA:000200 RegB:000050 C:0 GT:0
PC:000050 00/0050 IR:016370 DATI3A CBCD 70 RegA:000200 RegB:000050 C:0 GT:0
PC:000051 00/0051 IR:060166 ANDA     0166 RegA:000000 RegB:000050 C:0 GT:0
PC:000052 00/0052 IR:007500 AN0            RegA:000000 RegB:000050 C:0 GT:0
PC:000053 00/0053 IR:040045 INSZ     0045 RegA:000000 RegB:000050 C:0 GT:0
PC:000054 00/0054 IR:024045 JMP   I 0045 RegA:000000 RegB:000050 C:0 GT:0
PC:000070 00/0070 IR:210174 LDA      0174 RegA:000000 RegB:000050 C:0 GT:0
PC:000071 00/0071 IR:024057 JMP   I 0057 RegA:000200 RegB:000050 C:0 GT:0
PC:000134 00/0134 IR:110164 ADA      0164 RegA:000200 RegB:000050 C:0 GT:0
PC:000135 00/0135 IR:002004 INCB           RegA:000400 RegB:000050 C:0 GT:0
PC:000136 00/0136 IR:050177 DESZ     0177 RegA:000400 RegB:000051 C:0 GT:0
PC:000137 00/0137 IR:020133 JMP      0133 RegA:000400 RegB:000051 C:0 GT:0
PC:000133 00/0133 IR:030057 JSBR     0057 RegA:000400 RegB:000051 C:0 GT:0
PC:000060 00/0060 IR:250174 STA      0174 RegA:000400 RegB:000051 C:0 GT:0
PC:000061 00/0061 IR:210173 LDA      0173 RegA:000400 RegB:000051 C:0 GT:0
PC:000062 00/0062 IR:014670 DATO3A NOOP 70 RegA:000000 RegB:000051 C:0 GT:0
PC:000063 00/0063 IR:210174 LDA      0174 RegA:000000 RegB:000051 C:0 GT:0
PC:000064 00/0064 IR:014570 DATO2A NOOP 70 RegA:000400 RegB:000051 C:0 GT:0
PC:000065 00/0065 IR:011470 DATO1B SBCD 70 RegA:000400 RegB:000051 C:0 GT:0
PC:000066 00/0066 IR:032045 JSBR   Z 0045 RegA:000400 RegB:000051 C:0 GT:0
PC:000046 00/0046 IR:012770 SKIP B DONE 70 RegA:000400 RegB:000051 C:0 GT:0
PC:000050 00/0050 IR:016370 DATI3A CBCD 70 RegA:000400 RegB:000051 C:0 GT:0
PC:000051 00/0051 IR:060166 ANDA     0166 RegA:000000 RegB:000051 C:0 GT:0
PC:000052 00/0052 IR:007500 AN0            RegA:000000 RegB:000051 C:0 GT:0
PC:000053 00/0053 IR:040045 INSZ     0045 RegA:000000 RegB:000051 C:0 GT:0
PC:000054 00/0054 IR:024045 JMP   I 0045 RegA:000000 RegB:000051 C:0 GT:0
PC:000070 00/0070 IR:210174 LDA      0174 RegA:000000 RegB:000051 C:0 GT:0
PC:000071 00/0071 IR:024057 JMP   I 0057 RegA:000400 RegB:000051 C:0 GT:0
PC:000134 00/0134 IR:110164 ADA      0164 RegA:000400 RegB:000051 C:0 GT:0
PC:000135 00/0135 IR:002004 INCB           RegA:000600 RegB:000051 C:0 GT:0
PC:000136 00/0136 IR:050177 DESZ     0177 RegA:000600 RegB:000052 C:0 GT:0
PC:000137 00/0137 IR:020133 JMP      0133 RegA:000600 RegB:000052 C:0 GT:0
PC:000133 00/0133 IR:030057 JSBR     0057 RegA:000600 RegB:000052 C:0 GT:0
PC:000060 00/0060 IR:250174 STA      0174 RegA:000600 RegB:000052 C:0 GT:0
PC:000061 00/0061 IR:210173 LDA      0173 RegA:000600 RegB:000052 C:0 GT:0
PC:000062 00/0062 IR:014670 DATO3A NOOP 70 RegA:000000 RegB:000052 C:0 GT:0
PC:000063 00/0063 IR:210174 LDA      0174 RegA:000000 RegB:000052 C:0 GT:0
PC:000064 00/0064 IR:014570 DATO2A NOOP 70 RegA:000600 RegB:000052 C:0 GT:0
PC:000065 00/0065 IR:011470 DATO1B SBCD 70 RegA:000600 RegB:000052 C:0 GT:0
PC:000066 00/0066 IR:032045 JSBR   Z 0045 RegA:000600 RegB:000052 C:0 GT:0
PC:000046 00/0046 IR:012770 SKIP B DONE 70 RegA:000600 RegB:000052 C:0 GT:0
PC:000050 00/0050 IR:016370 DATI3A CBCD 70 RegA:000600 RegB:000052 C:0 GT:0
PC:000051 00/0051 IR:060166 ANDA     0166 RegA:000000 RegB:000052 C:0 GT:0
PC:000052 00/0052 IR:007500 AN0            RegA:000000 RegB:000052 C:0 GT:0
PC:000053 00/0053 IR:040045 INSZ     0045 RegA:000000 RegB:000052 C:0 GT:0
PC:000054 00/0054 IR:024045 JMP   I 0045 RegA:000000 RegB:000052 C:0 GT:0
PC:000070 00/0070 IR:210174 LDA      0174 RegA:000000 RegB:000052 C:0 GT:0
PC:000071 00/0071 IR:024057 JMP   I 0057 RegA:000600 RegB:000052 C:0 GT:0
PC:000134 00/0134 IR:110164 ADA      0164 RegA:000600 RegB:000052 C:0 GT:0
PC:000135 00/0135 IR:002004 INCB           RegA:001000 RegB:000052 C:0 GT:0
PC:000136 00/0136 IR:050177 DESZ     0177 RegA:001000 RegB:000053 C:0 GT:0
PC:000137 00/0137 IR:020133 JMP      0133 RegA:001000 RegB:000053 C:0 GT:0

Building the Emulator - Progress and the lack of it

March 2022

I did start to write an emulator many years ago, but got too busy to complete it. Still busy, but I am keen to get this going.
I have much of the documentation I need, and thanks to Joe Templeman, I have copies of the original coding sheets for a late version of LOS.

So, the plan (or hope) is to build a virtual M18 that boots LOS.

The bootstrap (just five words of core) is run at location 100. This loads all the sectors of the OS from disk into core. So, I need to understand the M18 I/O instructions. These were typically 'hidden' from the application programmers.

April 2022

Boot sector all works and loads the OS Sectors into place. Assuming we are going for a full boot, the Initiator then gets called. This is where the hard work starts! The initiator loads the Configuration Table from disk and sets up the various core based structures such as IO devices, disk drives, free core spaces, the system table, and file table(s). This is hard work!

* Booting into Special OP works, and that at least proves the terminal I/O instructions are being emulated correctly.

Things I discovered:
Left Shift and Right Shift is supposed to copy the bit that gets dropped into the Carry Flag. Didn't expect that. Perhaps also explains why (prior to the Mk V) the Carry flag indicator on the front panel is called 'Overflow'.
Endless corrections especially around the micro-instructions.

May 2022

With regard to disk transfers, and the three registers on the DD1600 disk controller, I have no documentation about this, so I need to piece it together bit by bit. From examing the code in the boot sector, I can see Reg 2 on the controller specifies the source/target location in core, and Reg 1 specifies the sector number on disk. The boot sector only loads one sector at a time, and sets Reg 3 to zero. In the initiator, when it loads the configuration table, which is three sectors long, it loads 004000 into Reg 3. 004000 is just one bit set. But if I assume the disk controller always loads one more sector than specified in Reg 3, I can place the sector count in bits 11,12 and 13. I seem to remember that 8 sectors was the largest transfer from a DD1600 - so that makes sense.
I have updated the 'hardware' disk controller to pick up the sector count from those bits, plus one. The CT now gets loaded in full.
Quite what the other bits in the control word do remains a mystery at the moment.

June 2022

The LOS boot sequence and the initiator:

Address 'Instruction' Notes
00/0100 Bootstrap Loads sector 0 to core address 0
Loads OS sectors
Checksums OS
00/0074 JUMP 06/0000 Jumps to Initiator
06/0000 JUMP 05/1000 Jumps to Map Core
05/1000 Checks SW interrupts
05/1012 Determines core length
05/1022 JSBR 05/1100 Loads CT - 3 sectors to 00/0400
05/1023 Check for single task
Duplicate recovery data
Duplicate start of zero page 05/0002 to 00/0002 94(d) words
05/1034 Establish free core chain
05/1072 JSBR 05/1210 Calls Establish Control(?) table
05/1210 Obtain task and mains off control blocks?
05/1036 JSBR IZ 1620
13/0241 Establish task 0 - builds a TCA for task 0
05/1037 ION Turning Interrupts on
05/1052 JSBR 05/0600 Establish disks
05/0600
05/1057 JSBR 300 Establish terminals
05/1060 JSBR 1400 Establish printers
05/1064 JSBR 1700 Establish file table
05/1065 JUMP I 1000 Done
06/0001 JSBR 500 Recovery sequence
06/0002 JUMP 150
06/0150 Duplicates resident overlays table
06/0157 JSBR 241 Load FT 0
06/0160 JSBR IZ 1670 Fetch control record
06/0164 JUMP 3
06/0003 JSBR 100 Fetch resident overlays
06/0004 JSBR 650 Fetch file tables
JSBR 40 initialise spool activity counters
Prepares LOS welcome message - core size and date etc
06/0024 JSBR 1653 Flash LOS message
06/0026 JUMP 226

Address	'Instruction'	Notes
00/0100	Bootstrap	Loads sector 0 to core address 0
		Loads OS sectors
		Checksums OS
00/0074	JUMP 06/0000	Jumps to Initiator
06/0000	JUMP 05/1000	Jumps to Map Core
05/1000		Checks SW interrupts
05/1012		Determines core length
05/1022	JSBR 05/1100	Loads CT - 3 sectors to 00/0400
05/1023		Check for single task
		Duplicate recovery data
		Duplicate start of zero page 05/0002 to 00/0002 94(d) words
05/1034		Establish free core chain
05/1072	JSBR 05/1210	Calls Establish Control(?) table
05/1210		Obtain task and mains off control blocks?
05/1036	JSBR IZ 1620
13/0241		Establish task 0 - builds a TCA for task 0
05/1037	ION	Turning Interrupts on
05/1052	JSBR 05/0600	Establish disks
05/0600
05/1057	JSBR 300	Establish terminals
05/1060	JSBR 1400	Establish printers
05/1064	JSBR 1700	Establish file table
05/1065	JUMP I 1000	Done
06/0001	JSBR 500	Recovery sequence
06/0002	JUMP 150
06/0150		Duplicates resident overlays table
06/0157	JSBR 241	Load FT 0
06/0160	JSBR IZ 1670	Fetch control record
06/0164	JUMP 3
06/0003	JSBR 100	Fetch resident overlays
06/0004	JSBR 650	Fetch file tables
	JSBR 40	initialise spool activity counters
		Prepares LOS welcome message - core size and date etc
06/0024	JSBR 1653	Flash LOS message
06/0026	JUMP 226